HD64F38024HV Datasheet, PDF (452/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 13 LCD Controller/Driver
Table 13.4 Power-Down Modes and Display Operation
Mode
Reset Active Sleep Watch
Sub-
active
Sub-
sleep
Module
Standby Standby
Clock φ
Runs Runs Runs Stops
Stops
Stops
Stops
Stops^*4
φw
Runs Runs Runs Runs
Runs
Runs
Stops^*1 Stops^*4
Display ACT = 0 Stops Stops Stops Stops
Stops
Stops
Stops^*2
operation _{ACT = 1 Stops Functions Functions Functions*}3 _Functions*3 _Functions*3 _Stops*2
Stops
Stops
Notes: 1. The subclock oscillator does not stop, but clock supply is halted.
2. The LCD drive power supply is turned off regardless of the setting of the PSW bit.
3. Display operation is performed only if φw, φw/2, or φw/4 is selected as the operating
clock.
4. The clock supplied to the LCD stops.
13.3.4 Boosting the LCD Drive Power Supply
When a large panel is driven, the on-chip power supply capacity may be insufficient. If the power
supply capacity is insufficient when V_CC is used as the power supply, the power supply impedance
must be reduced. This can be done by connecting bypass capacitors of around 0.1 to 0.3 µF to
pins V₁ to V₃, as shown in figure 13.9, or by adding a split-resistance externally.
R
V_CC
V₁
R
This LSI
V₂
R
V₃
R
V_SS
R = several kΩ to
several MΩ
C = 0.1 to 0.3 μF
Figure 13.9 Connection of External Split-Resistance
Rev. 8.00 Mar. 09, 2010 Page 430 of 658
REJ09B0042-0800