HD64F38024HV Datasheet, PDF (147/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 5 Power-Down Modes
Bits 6 to 4—Standby Timer Select 2 to 0 (STS2 to STS0)
These bits designate the time the CPU and peripheral modules wait for stable clock operation after
exiting from standby mode or watch mode to active mode due to an interrupt. The designation
should be made according to the operating frequency so that the waiting time is at least equal to
the oscillation stabilization time. Note that stabilization times for the H8/38024, H8/38024S, and
H8/38024R Group and for the H8/38124 Group are different.
• H8/38024, H8/38024S, H8/38024R Group
Bit 6
STS2
0
0
0
0
1
1
1
1
Bit 5
STS1
0
0
1
1
0
0
1
1
Bit 4
STS0
0
1
0
1
0
1
0
1
Description
Wait time = 8,192 states
(initial value)
Wait time = 16,384 states
Wait time = 1,024 states
Wait time = 2,048 states
Wait time = 4,096 states
Wait time = 2 states
(External clock input mode)
Wait time = 8 states
Wait time = 16 states
• H8/38124 Group
Bit 6
STS2
0
0
0
0
1
1
1
1
Bit 5
STS1
0
0
1
1
0
0
1
1
Bit 4
STS0
0
1
0
1
0
1
0
1
Description
Wait time = 8,192 states
(initial value)
Wait time = 16,384 states
Wait time = 32,768 states
Wait time = 65,536 states
Wait time = 131,072 states
Wait time = 2 states
(External clock input mode)
Wait time = 8 states
Wait time = 16 states
Note:
If an external clock is being input, set standby timer select to external clock mode before
mode transition. Also, do not set standby timer select to external clock mode if no external
clock is used. 8,192 states (STS2 = STS1 = STS0 = 0) is recommended if the on-chip
oscillator is used on the H8/38124 Group.
Rev. 8.00 Mar. 09, 2010 Page 125 of 658
REJ09B0042-0800