HD64F38024HV Datasheet, PDF (122/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 3 Exception Handling
Interrupt Request
Flags Set to 1
IWPR
IWPF7
IWPF6
IWPF5
IWPF4
IWPF3
IWPF2
IWPF1
IWPF0
Conditions
When PMR5 bit WKP7 is changed from 0 to 1 while pin WKP7 is low and WEGR bit
WKEGS7 = 0.
When PMR5 bit WKP7 is changed from 1 to 0 while pin WKP7 is low and WEGR bit
WKEGS7 = 1.
When PMR5 bit WKP6 is changed from 0 to 1 while pin WKP6 is low and WEGR bit
WKEGS6 = 0.
When PMR5 bit WKP6 is changed from 1 to 0 while pin WKP6 is low and WEGR bit
WKEGS6 = 1.
When PMR5 bit WKP5 is changed from 0 to 1 while pin WKP5 is low and WEGR bit
WKEGS5 = 0.
When PMR5 bit WKP5 is changed from 1 to 0 while pin WKP5 is low and WEGR bit
WKEGS5 = 1.
When PMR5 bit WKP4 is changed from 0 to 1 while pin WKP4 is low and WEGR bit
WKEGS4 = 0.
When PMR5 bit WKP4 is changed from 1 to 0 while pin WKP4 is low and WEGR bit
WKEGS4 = 1.
When PMR5 bit WKP3 is changed from 0 to 1 while pin WKP3 is low and WEGR bit
WKEGS3 = 0.
When PMR5 bit WKP3 is changed from 1 to 0 while pin WKP3 is low and WEGR bit
WKEGS3 = 1.
When PMR5 bit WKP2 is changed from 0 to 1 while pin WKP2 is low and WEGR bit
WKEGS2 = 0.
When PMR5 bit WKP2 is changed from 1 to 0 while pin WKP2 is low and WEGR bit
WKEGS2 = 1.
When PMR5 bit WKP1 is changed from 0 to 1 while pin WKP1 is low and WEGR bit
WKEGS1 = 0.
When PMR5 bit WKP1 is changed from 1 to 0 while pin WKP1 is low and WEGR bit
WKEGS1 = 1.
When PMR5 bit WKP0 is changed from 0 to 1 while pin WKP0 is low and WEGR bit
WKEGS0 = 0.
When PMR5 bit WKP0 is changed from 1 to 0 while pin WKP0 is low and WEGR bit
WKEGS0 = 1.
Figure 3.7 shows the procedure for setting a bit in a port mode register and clearing the interrupt
request flag.
When switching a pin function, mask the interrupt before setting the bit in the port mode register
(or AEGSR). After accessing the port mode register (or AEGSR), execute at least one instruction
(e.g., NOP), then clear the interrupt request flag from 1 to 0. If the instruction to clear the flag is
Rev. 8.00 Mar. 09, 2010 Page 100 of 658
REJ09B0042-0800