HD64F38024HV Datasheet, PDF (468/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 14 Power-On Reset and Low-Voltage Detection Circuits (H8/38124 Group Only)
Operation and Cancellation Setting Procedure Using LVDR and LVDI:
Settings should be made as indicated below in order to ensure proper operation of the low voltage
detection circuit or to cancel operation. Figure 14.7 shows the setting timing for low voltage
detection circuit operation and cancellation.
1. To turn on the low voltage detection circuit, first set the LVDE bit in LVDCR to 1.
2. After waiting for LVDCNT overflow, etc., to ensure that the stabilization time (t_LVDON = 150
μs) for the reference voltage and low voltage detection power supply has elapsed, clear bits
LVDDF and LVDUF in LVDSR to 0. If necessary, set the LVDRE, LVDDE, and LVDUE bits
in LVDCR to 1.
3. To cancel operation of the low voltage detection circuit, clear bits LVDRE, LVDDE, and
LVDUE to 0, then clear bit LVDE to 0. Bit LVDE should not be cleared at the same time as
bits LVDRE, LVDDE, and LVDUE to avoid malfunction.
LVDE
LVDRE
LVDDE
LVDUE
tLVDON
Figure 14.7 Low Voltage Detection Circuit Operation and Cancellation Setting Timing
Rev. 8.00 Mar. 09, 2010 Page 446 of 658
REJ09B0042-0800