HD64F38024HV Datasheet, PDF (583/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

ECCR—Event Counter Control Register
Appendix B Internal I/O Registers
H'94
AEC
Bit
7
6
5
4
3
2
1
0
ACKH1 ACKH0 ACKL1 ACKL0 PWCK2 PWCK1 PWCK0 ⎯
Initial value
0
0
0
0
0
0
0
0
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Event Counter PWM Clock Select
Bit 3 Bit 2 Bit 1
PWCK2 PWCK1 PWCK0
0
0
0
φ/2
0
0
1
φ/4
0
1
0
φ/8
0
1
1
φ/16
1
*
0
φ/32
1
*
1
φ/64
AEC Clock Select L
Bit 5 Bit 4
ACKL1 ACKL0
Description
0
0
AEVL pin input
0
1
φ/2
1
0
φ/4
1
1
φ/8
Description
*: Don't care
AEC Clock Select H
Bit 7 Bit 6
ACKH1 ACKH0
Description
0
0
AEVH pin input
0
1
φ/2
1
0
φ/4
1
1
φ/8
Rev. 8.00 Mar. 09, 2010 Page 561 of 658
REJ09B0042-0800