HD64F38024HV Datasheet, PDF (128/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 4 Clock Pulse Generators
Bit 2—IRQAEC Flag (IRQAECF)
This bit indicates the IRQAEC pin input level set during resets.
Bit 2
IRQAECF
0
1
Description
IRQAEC pin set to GND during resets
IRQAEC pin set to VCC during resets
Bit 1—OSC Flag (OSCF)
This bit indicates the oscillator operating with the system clock pulse generator.
Bit 1
OSCF
0
1
Description
System clock oscillator operating (on-chip oscillator stopped)
On-chip oscillator operating (system clock oscillator stopped)
Bit 0—Reserved
This bit is reserved. Never write 1 to this bit, as it can cause the LSI to malfunction.
4.2 System Clock Generator
Clock pulses can be supplied to the system clock divider either by connecting a crystal or ceramic
oscillator, or by providing external clock input. As shown in figure 4.2, the H8/38124 Group
supports selection between a system clock oscillator and an on-chip oscillator. See section 4.2,
On-Chip Oscillator Selection Method, for information on selecting the on-chip oscillator.
Connecting a Crystal Oscillator
Figure 4.3(1) shows a typical method of connecting a crystal oscillator to the H8/38024 or
H8/38024R Group, and figure 4.3(2) shows a typical method of connecting a crystal oscillator to
the H8/38024S and H8/38124 Group.
Rev. 8.00 Mar. 09, 2010 Page 106 of 658
REJ09B0042-0800