UPD784938 Datasheet, PDF (94/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 3 CPU ARCHITECTURE
3.8.2 Functions
In addition to being manipulated in 8-bit units, the general-purpose registers can also be manipulated in 16-bit units by pairing
two 8-bit registers. Also, four of the 16-bit registers can be combined with an 8-bit register for address extension and manipulated
in 24-bit units.
Each register can be used in a general-purpose way for temporary storage of an operation result and as the operand of an
inter-register operation instruction.
The area from 0FE80H to 0FEFFH (when the LOCATION 0 instruction is executed; 0FFE80H to 0FFEFFH when the
LOCATION 0FH instruction is executed) can be given an address specification and accessed as ordinary data memory
irrespective of whether or not it is used as the general-purpose register area.
As 8 register banks are provided in the 78K/IV Series, efficient programs can be written by using different register banks for
normal processing and processing in the event of an interrupt.
The registers have the following specific functions.
A (R1):
• Register mainly used for 8-bit data transfers and operation processing. Can be used in combination with all addressing
modes for 8-bit data.
• Can also be used for bit data storage.
• Can be used as the register that stores the offset value in indexed addressing and based indexed addressing.
X (R0):
• Can be used for bit data storage.
AX (RP0):
• Register mainly used for 16-bit data transfers and operation processing. Can be used in combination with all
addressing modes for 16-bit data.
AXDE:
• Used for 32-bit data storage when a DIVUX, MACW, or MACSW instruction is executed.
B (R3):
• Has a loop counter function, and can be used by the DBNZ instruction.
• Can be used as the register that stores the offset value in indexed addressing and based indexed addressing.
• Used as the MACW and MACSW instruction data pointer.
C (R2):
• Has a loop counter function, and can be used by the DBNZ instruction.
• Can be used as the register that stores the offset value in based indexed addressing.
• Used as the counter in a string instruction and the SACW instruction.
• Used as the MACW and MACSW instruction data pointer.
RP2:
• Used to save the low-order 16 bits of the program counter (PC) when context switching is used.
RP3:
• Used to save the high-order 4 bits of the program counter (PC) and the program status word (PSW) (excluding bits
0 to 3 of PSWH) when context switching is used.
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Preliminary User’s Manual U13987EJ1V0UM00