UPD784938 Datasheet, PDF (549/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 23 INTERRUPT FUNCTIONS
Cautions 1. Macro service requests are acknowledged and serviced even during execution of a non-maskable
interrupt service program. If you do not want macro service processing to be performed during
a non-maskable interrupt service program, you should manipulate the interrupt mask register in
the non-maskable interrupt service program to prevent macro service generation.
2. The RETI instruction must be used to return from a non-maskable interrupt. Subsequent interrupt
acknowledgment will not be performed normally if a different instruction is used.
3. Non-maskable interrupts are always acknowledged, except during non-maskable interrupt service
program execution (except when a high non-maskable interrupt request is generated during
execution of a low-priority non-maskable interrupt service program) and for a certain period after
execution of the special instructions shown in 23.9 When Interrupt Requests and Macro Service
are Temporarily Held Pending. Therefore, a non-maskable interrupt will be acknowledged even
when the stack pointer (SP) value is undefined, in particular after reset release, etc. In this case,
depending on the value of the SP, it may happen that the program counter (PC) and program status
word (PSW) are written to the address of a write-inhibited special function register (SFR) (see Table
3-5 in 3.9 Special Function Registers (SFR)), and the CPU becomes deadlocked, or an unexpected
signal is output from a pin, or the PC and PSW are written to an address in which RAM is not
mounted, with the result that the return from the non-maskable interrupt service program to the
main routine is not performed normally and an inadvertent program routine occurs.
Therefore, the program following RESET release must be as shown below.
CSEG AT 0
DW STRT
CSEG BASE
STRT:
LOCATION 0FH; or LOCATION 0
MOVG SP, #imm24
Preliminary User’s Manual U13987EJ1V0UM00
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