UPD784938 Datasheet, PDF (280/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 10 TIMER/EVENT COUNTER 1
10.4 Timer Counter 1 (TM1) Operation
10.4.1 Basic operation
8-bit operation mode/16-bit operation mode control can be performed for timer/event counter 1 by means of bit 0 (BW1) of
timer control register 1 (TMC1)^Note.
In the timer/event counter 1 count operation, the count-up is performed using the count clock specified by the low-order 4
bits of prescaler mode register 1 (PRM1).
Count operation enabling/disabling is controlled by bit 3 (CE1) of TMC1 (timer/event counter 1 operation control is performed
by the low-order 4 bits of the TMC1). When the CE1 bit is set (to 1) by software, the contents of TM1 are cleared to 0H on the
first count clock, and then the count-up operation is performed.
When the CE1 bit is cleared (to 0), TM1 becomes 0H immediately, and capture operations and match signal generation are
stopped.
If the CE1 bit is set (to 1) again when it is already set (to 1), TM1 continues the count operation without being cleared.
If the count clock is input when TM1 is FFH in 8-bit operation mode and when TM1W is FFFFH in 16-bit operation mode, TM1/
TM1W becomes 0H. In this case, OVF1 bit is set. OVF1 bit is cleared by software only. The count operation is continued.
When RESET is input, TM1 is cleared to 0H, and the count operation is stopped.
Note Unless otherwise specified, the functions of timer counter 1 in the 8-bit operation mode are described hereafter. In
the 16-bit operation mode, TM1, CR10, and CR11 operate as TM1W, CR10W, and CR11W respectively.
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