UPD784938 Datasheet, PDF (482/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 20 IEBus CONTROLLER
• ^{Hardware configuration and function}
The IEBus mainly consists of the following six internal blocks.
• CPU interface block
• Interrupt control block
• Internal registers
• Bit processing block
• Field processing block
• IEBus interface block
<CPU interface block>
This is a control block that interfaces between the CPU (78K/IV) and IEBus.
<Interrupt control block>
This control block transfers interrupt request signals from the IEBus to the CPU.
<Internal registers>
These registers set data to the control registers and fields that control the IEBus (for the internal registers, refer to
20.4 Internal Registers of IEBus Controller).
<Bit processing block>
This block generates and disassembles bit timing, and mainly consists of a bit sequence ROM, 8-bit preset timer,
and comparator.
<Field processing block>
This block generates each field in the communication frame, and mainly consists of a field sequence ROM, 4-bit down
counter, and comparator.
<IEBus interface block>
This is the interface block for an external driver/receiver, and mainly consists of a noise filter, shift register, collision
detector, parity detector, parity generation circuit, and ACK/NACK generation circuit.
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Preliminary User’s Manual U13987EJ1V0UM00