UPD784938 Datasheet, PDF (644/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 25 STANDBY FUNCTION
(1) Release by non-maskable interrupt
When a non-maskable interrupt is generate, the µPD784938 is released from HALT mode irrespective of whether the
interrupt acknowledgment enabled state (EI) or disabled state (DI) is in effect.
When the µPD784938 is released from HALT mode, if the non-maskable interrupt that released HALT mode can be
acknowledged, acknowledgment of that non-maskable interrupt is performed and a branch is made to the service
program. If the interrupt cannot be acknowledged, the instruction following the instruction that set the HALT mode (the
MOV STBC, #byte instruction) is executed, and the non-maskable interrupt that released the HALT mode is
acknowledged when acknowledgment becomes possible. See 23.6 Non-maskable Interrupt Acknowledgment
Operation for details of non-maskable interrupt acknowledgment.
(2) Release by maskable interrupt request
HALT mode release by a maskable interrupt request can only be performed by an interrupt for which the interrupt mask
flag is 0.
When HALT mode is released, if an interrupt can be acknowledged when the interrupt request enable flag (IE) is set
(to 1), a branch is made to the interrupt service program. If the interrupt cannot be acknowledged and if the IE flag
is cleared (to 0), execution is resumed from the instruction following the instruction that set the HALT mode. See 23.7
Maskable Interrupt Acknowledgment Operation for details of interrupt acknowledgment.
With macro service, HALT mode is released temporarily, service is performed once, then HALT mode is restored. When
macro service has been performed the specified number of times, HALT mode is released if the VCIC bit in the macro
service mode register of the macro service control word is cleared (to 0). The operation after release in this case is
the same as for release by a maskable interrupt described earlier. If the VCIE bit is set (to 1), the HALT mode is entered
again and is released by the next interrupt request.
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Preliminary User’s Manual U13987EJ1V0UM00