UPD784938 Datasheet, PDF (437/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 18 ASYNCHRONOUS SERIAL INTERFACE/3-WIRE SERIAL I/O
18.2.5 Transmission
The µPD784938’s asynchronous serial interface is set to the transmission enabled state when the TXE bit of the
asynchronous serial interface mode register (ASIM) is set (to 1). A transmit operation is started by writing transmit data
to the serial transmit shift register (TXS) when transmission is enabled. The start bit, parity bit and stop bit(s) are added
automatically.
When a transmit operation is started, the data in the TXS is shifted out, and a transmission completion interrupt (INTST)
is generated when the TXS is empty.
If no more data is written to the TXS, the transmit operation is discontinued.
If the TXE bit is cleared (to 0) during a transmit operation, the transmit operation is discontinued immediately.
Figure 18-6. Asynchronous Serial Interface Transmission Completion Interrupt Timing
(a) Stop bit length: 1
TxD (output)
INTST
D0 D1 D2
START
STOP
D6 D7 Parity
(b) Stop bit length: 2
TxD (output)
INTST
D0 D1 D2
START
D6 D7 Parity
STOP
Cautions 1. After RESET input the serial transmit shift register (TXS) is emptied but a transmission completion
interrupt is not generated. A transmit operation can be started by writing transmit data to the TXS.
2. An asynchronous serial interface mode register (ASIM) rewrite should not be performed during
a transmit operation. If an ASIM rewrite is performed during a transmit operation, subsequent
transmit operations may not be possible (normal operation is restored by RESET input). Software
can determine whether transmission is in progress by using a transmission completion interrupt
(INTST) or the interrupt request flag (STIF) set by INTST.
Preliminary User’s Manual U13987EJ1V0UM00
437