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UPD784938 Datasheet, PDF (703/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers
CHAPTER 29 INSTRUCTION OPERATIONS
Mnemonic
Operands
BFSET
DBNZ
saddr.bit, $addr20
sfr.bit, $addr20
X.bit, $addr20
A.bit, $addr20
PSWL.bit, $addr20
PSWH.bit, $addr20
!addr16.bit, $addr20
!!addr24.bit, $addr20
mem2.bit, $addr20
B, $addr20
C, $addr20
$addr, $addr20
Bytes
4/5
4
3
3
3
3
6
3
3
2
2
3/4
Operation
{PC ← PC + 4Note 2 + jdisp8, (saddr.bit) ← 1}
if (saddr.bit) = 0
{PC ← PC + 4 + jdisp8, sfr.bit ← 1} if sfr.bit = 0
{PC ← PC + 3 + jdisp8, X.bit ← 1} if X.bit = 0
{PC ← PC + 3 + jdisp8, A.bit ← 1} if A.bit = 0
{PC ← PC + 3 + jdisp8, PSWL.bit ← 1}
if PSWL.bit = 0
{PC ← PC + 3 + jdisp8, PSWH.bit ← 1}
if PSWH.bit = 0
{PC ← PC + 3 + jdisp8, !addr16.bit ← 1}
if !addr16.bit = 0
{PC ← PC + 3 + jdisp8, !!addr24.bit ← 1}
if !!addr24.bit = 0
{PC ← PC + 3 + jdisp8, mem2.bit ← 1}
if mem2.bit = 0
B ← B – 1, PC ← PC + 2 + jdisp8 if B ≠ 0
C ← C – 1, PC ← PC + 2 + jdisp8 if C ≠ 0
(saddr) ← (saddr) – 1,
PC ← PC + 3Note 1 = jdisp8 if (saddr) ≠ 0
Flags
S Z AC P/V CY
×××××
Notes 1. When the number of bytes is 3. When 4, the operation is: PC ← PC + 4 + jdisp8.
2. When the number of bytes is 4. When 5, the operation is: PC ← PC + 5 + jdisp8.
(19) CPU control instructions: MOV, LOCATION, SEL, SWRS, NOP, EI, DI
Mnemonic
Operands
MOV
LOCATION
SEL
SWRS
NOP
EI
DI
STBC, #byte
WDM, #byte
locaddr
RBn
RBn, ALT
Bytes
Operation
4
STBC ← byte
4
WDM ← byte
4
SFR, internal data area location address
upper word specification
2
RSS ← 0, RBS2 – 0 ← n
2
RSS ← 1, RBS2 – 0 ← n
2
RSS ← RSS
1
No Operaton
1
IE ← 1 (Enable interrupt)
1
IE ← 0 (Disable interrupt)
Flags
S Z AC P/V CY
Preliminary User’s Manual U13987EJ1V0UM00
703