UPD784938 Datasheet, PDF (519/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 22 EDGE DETECTION FUNCTION
7
INTM1 0
Figure 22-2. External Interrupt Mode Register 1 (INTM1) Format
6
5
4
3
2
1
0 Address After reset R/W
0 ES51 ES50 ES41 ES40 ES31 ES30 0FFA1H
00H
R/W
ES31 ES30 P24 (INTP3, CR02 Capture Trigger,
TM0 Count Clock) Pin Input
Detected Edge Specification
0 0 Falling edge
0 1 Rising edge
1 0 Setting prohibited
1 1 Both falling & rising edges
ES41 ES40 P25 (INTP4) Pin Input Detected
Edge Specification
0 0 Falling edge
0 1 Rising edge
1 0 Setting prohibited
1 1 Both falling & rising edges
ES51 ES50 P26 (INTP5, A/D Conversion Start
Signal) Pin Input Detected Edge
Specification
0 0 Falling edge
0 1 Rising edge
1 0 Setting prohibited
1 1 Both falling & rising edges
Caution Valid edge detection cannot be performed when the valid edge is changed by a write to the external
interrupt mode register (INTMn: n = 0, 1). Also, if an edge is input during a change of the valid edge,
that edge may or may not be judged to be a valid edge.
Preliminary User’s Manual U13987EJ1V0UM00
519