UPD784938 Datasheet, PDF (46/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

1.5 Block Diagram
NMI
INTP0 to INTP5
INTP3
TO0
TO1
INTP0
INTP1
INTP2/CI
TO2
TO3
PROGRAMMABLE
INTERRUPT
CONTROLLER
TIMER/EVENT
COUNTER0
(16 BITS)
TIMER/EVENT
COUNTER1
(16 BITS)
TIMER/EVENT
COUNTER2
(16 BITS)
TIMER3
(16 BITS)
P00 to P03
P04 to P07
PWM0
PWM1
REAL-TIME
OUTPUT PORT
PWM
ANI0 to ANI7
AVDD
AVREF1
AVSS
INTP5
A/D
CONVERTER
TX
RX
RESET
TEST
X1
X2
REGC
REGOFF
VPP^Note
VDD
VSS
XT1
XT2
IEBus
CONTROLLER
SYSTEM
CONTROL
(REGULATOR)
WATCH
TIMER
CHAPTER 1 GENERAL
78 K/IV
CPU CORE
ROM
RAM
WATCHDOG
TIMER
UART/IOE2
BAUD-RATE
GENERATOR
UART/IOE1
BAUD-RATE
GENERATOR
CLOCKED
SERIAL
INTERFACE
CLOCKED
SERIAL
INTERFACE3
CLOCK OUTPUT
BUS I/F
PORT0
PORT1
PORT2
PORT3
PORT4
PORT5
PORT6
PORT7
PORT9
PORT10
RxD/SI1
TxD/SO1
ASCK/SCK1
RxD2/SI2
TxD2/SO2
ASCK2/SCK2
SCK0
SO0
SI0
SCK3
SO3
SI3
ASTB/CLKOUT
AD0 to AD7
A8 to A15
A16 to A19
RD
WR
WAIT/HLDRQ
REFRQ/HLDAK
D0 to D7^Note
A0 to A16^Note
CE^Note
OE^Note
PGM^Note
P00 to P07
P10 to P17
P20 to P27
P30 to P37
P40 to P47
P50 to P57
P60 to P67
P70 to P77
P90 to P97
P100 to P107
Note µPD78F4938 only
Remark The capacities of the internal ROM and RAM varies depending on the product.
46
Preliminary User’s Manual U13987EJ1V0UM00