UPD784938 Datasheet, PDF (277/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 10 TIMER/EVENT COUNTER 1
10.3 Timer/Event Counter 1 Control Registers
(1) Timer control register 1 (TMC1)
TMC1 controls the timer/event counter 1, TM1/TM1W, count operation by the low-order 4 bits (the high-order 4 bits control
the count operation of timer/event counter 2 TM2/TM2W).
TMC1 can be read or written to with an 8-bit manipulation instruction or bit manipulation instruction. The format of TMC1
is shown in Figure 10-2.
RESET input clears TMC1 to 00H.
Figure 10-2. Timer Control Register 1 (TMC1) Format
7
6
5
4
3
2
1
TMC1 CE2 OVF2 CMD2 BW2 CE1 OVF1 0
0 Address After reset R/W
BW1 0FF5FH
00H
R/W
Remark The OVF1 bit is reset by software only.
BW1
Timer/Event Counter 1 Bit Length
Specification
0 8-bit operating mode
1 16-bit operating mode
OVF1
TM1/TM1W Overflow Flag
0 No overflow
1
Overflow^Note
Note In 8-bit operating mode:
count up from FFH to 00H
In 16-bit operating mode:
count up from FFFFH to 0000H
CE1 TM1/TM1W Count Operation Control
0 Count operation stopped with count cleared
1 Count operation enabled
Countrols count operation of timer/event counter 2
(TM2/TM2W) (see Figure 11-2).
Preliminary User’s Manual U13987EJ1V0UM00
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