UPD784938 Datasheet, PDF (321/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 11 TIMER/EVENT COUNTER 2
11.5 External Event Counter Function
Timer/event counter 2 can count clock pulses input from external interrupt request input pin (INTP2/CI).
No special selection method is needed for the external event counter operation mode. When the timer counter 2 (TM2)
count clock is specified as external clock input by the setting of the high-order 4 bits of prescaler mode register 1 (PRM1),
TM2 operates as an external event counter.
The maximum frequency of external clock pulses that can be counted by TM2 as the external event counter is 2.10 MHz
(fCLK = 12.58 MHz) irrespective of whether only one edge or both edges are counted on INTP2/CI input.
The pulse width of INTP2/CI input must be at least 3 system clocks (0.24 µs: fCLK = 12.58 MHz) for both the high level
and low level. If the pulse width is shorter than this, the pulse may not be counted.
The timer/event counter 2 external event count timing is shown in Figure 11-11.
Figure 11-11. Timer/Event Counter 2 External Event Count Timing
(1) Counting one edge (maximum frequency = fCLK/6)
3/fCLK (MIN.) 3/fCLK (MIN.) 6/fCLK (MIN.)
CI
2-3/fCLK
ICI
TM2
Dn
Dn+1
Dn+2
Dn+3
Remark ICI: CI input signal after passing through edge detection circuit
(2) Counting both edges (maximum frequency = fCLK/6)
3/fCLK (MIN.) 3/fCLK (MIN.)
6/fCLK (MIN.)
CI
2-3/fCLK
ICI
TM2
Dn
Dn+1
Dn+2
Dn+3
Dn+4
Remark ICI: CI input signal after passing through edge detection circuit
Dn+5
Preliminary User’s Manual U13987EJ1V0UM00
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