UPD784938 Datasheet, PDF (68/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 3 CPU ARCHITECTURE
(1) When LOCATION 0 instruction is executed
• Internal memory
The internal data area and internal ROM area are follows:
Part Number
µPD784935
Internal Data Area
0EB00H to 0FFFFH
µPD784936
0E500H to 0FFFFH
µPD784937
0DF00H to 0FFFFH
µPD784938
µPD78F4938
0D600H to 0FFFFH
Internal ROM Area
00000H to 0EAFFH
10000H to 17FFFH
00000H to 0E4FFH
10000H to 1FFFFH
00000H to 0DEFFH
10000H to 2FFFFH
00000H to 0D5FFH
10000H to 3FFFFH
Caution The following areas of the internal ROM that overlap the internal data area cannot be used when the
LOCATION 0 instruction is executed.
Part Number
µPD784935
µPD784936
µPD784937
µPD784938
µPD78F4938
Area That Cannot Be Used
0EB00H to 0FFFFH (5,376 bytes)
0E500H to 0FFFFH (6,192 bytes)
0DF00H to 0FFFFH (8,448 bytes)
0D600H to 0FFFFH (10,752 bytes)
• External memory
The external memory is accessed in the external memory expansion mode.
(2) When LOCATION 0FH instruction is executed
• Internal memory
The internal data area and internal ROM area are follows:
Part Number
µPD784935
µPD784936
µPD784937
µPD784938
µPD78F4938
Internal Data Area
FEB00H to FFFFFH
FE500H to FFFFFH
FDF00H to FFFFFH
FD600H to FFFFFH
Internal ROM Area
00000H to 17FFFH
00000H to 1FFFFH
00000H to 2FFFFH
00000H to 3FFFFH
• External memory
The external memory is accessed in the external memory expansion mode.
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Preliminary User’s Manual U13987EJ1V0UM00