UPD784938 Datasheet, PDF (431/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 18 ASYNCHRONOUS SERIAL INTERFACE/3-WIRE SERIAL I/O
(1) Serial receive buffer (RXB/RXB2)
This is the register that holds the receive data. Each time one byte of data is received, the receive data is transferred
from the shift register.
If a 7-bit data length is specified, receive data is transferred to bits 0 to 6 of RXB/RXB2, and the MSB of RXB/RXB2
is always “0”.
RXB/RXB2 can be read only by an 8-bit manipulation instruction. The contents of RXB/RXB2 are undefined after RESET
input.
(2) Serial transmit shift register (TXS/TXS2)
This is the register in which the data to be transmitted is set. Data written to the TXS/TXS2 is transmitted as serial
data.
If a 7-bit data length is specified, bits 0 to 6 of the data written in the TXS/TXS2 are treated as transmit data. A transmit
operation starts when a write to the TXS/TXS2 is performed. The TXS/TXS2 cannot be written to during a transmit
operation.
TXS/TXS2 can be written to only with an 8-bit manipulation instruction. The contents of TXS/TXS2 are undefined after
RESET input.
(3) Shift register
This is the shift register that converts the serial data input to the RxD pin to parallel data. When one byte of data is
received, the receive data is transferred to the receive buffer.
The shift register cannot be manipulated directly by the CPU.
(4) Reception control parity check
Receive operations are controlled in accordance with the contents set in the asynchronous serial interface mode register
(ASIM/ASIM2). In addition, parity error and other error checks are performed during receive operations, and if an error
is detected, a value is set in the asynchronous serial interface status register (ASIS/ASIS2) according to the type of
error.
(5) Transmission control parity addition
Transmission operation is controlled by appending a start bit, parity bit, and stop bit to the data written to the serial
transmit shift registers (TXS/TXS2) in accordance with the contents set to the asynchronous serial interface mode
registers (ASIM/ASIM2).
(6) Selector
Selects the baud rate clock source.
Preliminary User’s Manual U13987EJ1V0UM00
431