UPD784938 Datasheet, PDF (627/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

(a) Read timing
CHAPTER 24 LOCAL BUS INTERFACE FUNCTION
Figure 24-14. Timing with External Wait Signal
fCLK^Note
A8 to A15
(output)
High address
AD0 to AD7
Low
address
Hi-Z
Hi-Z
Data (input)
ASTB (output)
RD (output)
WAIT (input)
(b) Write timing
fCLK^Note
A8 to A15
(output)
High address
AD0 to AD7
(output)
Low
Hi-Z
address
Data
Hi-Z
ASTB (output)
WR (output)
WAIT (input)
Note fCLK: Internal system clock frequency. This signal is only present inside the µPD784938.
Preliminary User’s Manual U13987EJ1V0UM00
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