UPD784938 Datasheet, PDF (590/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 23 INTERRUPT FUNCTIONS
Figure 23-37. Automatic Addition Control + Ring Control Block Diagram 2
(1-2-phase excitation constant-velocity operation)
1 M memory space
Macro service control word,
macro service channel
(internal RAM)
Output timing: 1233FFH ^{∆ t}
123007H
D7
D6
Output data (8 Items)
...
123000H
D0
MSC
0FE7AH
TSFRP
FFH
FFH
14H Low-order 8 bits of CR10 address
12H
MPT
33H
FFH
DSFRP 0EH Low-order 8 bits of P0L address
12H
MPD
30H
07H
MR
08H
RC
08H
Addition
Compare register
CR10
Match
Timer counter 1
TM1
Channel
pointer
Mode
register
7AH
3CH Type C, MPT retained, MPD
decremented, 1-byte timer data,
automatic addition, ring control,
interrupt request generation
at MSC = 0
Buffer register
P0L
INTC10
Output
latch P0
P00
P01 _{To stepping}
P02 ^motor
P03
Remark Internal RAM addresses in the figure are the values when the LOCATION 0 instruction is executed.
When the LOCATION 0FH instruction is executed, 0F0000H should be added to the values in the figure.
590
Preliminary User’s Manual U13987EJ1V0UM00