UPD784938 Datasheet, PDF (298/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 10 TIMER/EVENT COUNTER 1
10.7.3 Pulse width measurement operation
In pulse width measurement, the high-level or low-level width of external pulses input to the external interrupt request input
pin (INTP0) is measured.
Both the high-level and low-level widths of pulses input to the INTP0 pin must be at least 3 sampling clocks selected by
SCS0; if shorter than this, the valid edge will not be detected and a capture operation will not be performed.
As shown in Figure 10-26, the timer counter 1 (TM1) value being counted is fetched into the capture/compare register (CR11)
set as a capture register in synchronization with a valid edge (set as both rising and falling edges) in the INTP0 pin input, and
held there. The pulse width is obtained from the product of the difference between the TM1 count value (Dn) fetched into and
held in the CR11 on detection of the nth valid edge and the count value (Dn-1) fetched and held on detection of valid edge n-1,
and the number of count clocks (x/fXX; x = 4, 8, 16, 32, 64, 128, 256, 512, 1,024).
The control register settings are shown in Figure 10-27, and the setting procedure in Figure 10-28.
Figure 10-26. Pulse Width Measurement Timing (when CR11 is used as Capture Register)
FFH
FFH
TM1
count value
D1
D3
0H
INTP0
external input signal
INTP0
interrupt request
D0
Capture
Count start
CE1 ← 1
Capture
D2
Capture
Capture
(D1-D0) × x/fXX
(100H-D1+
D2) × x /fXX
(D3-D2) × x /fXX
Capture/compare
register (CR11)
D0
D1
D2
D3
OVF1
Remark Dn: TM1 count value (n = 0, 1, 2, ...)
x = 4, 8, 16, 32, 64, 128, 256, 512, 1,024
Cleard by software
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Preliminary User’s Manual U13987EJ1V0UM00