UPD784938 Datasheet, PDF (223/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 9 TIMER/EVENT COUNTER 0
(3) Capture/compare control register 0 (CRC0)
CRC0 specifies the enabling conditions for the TM0 clear operation by a match signal between the contents of the compare
register (CR01) and the timer counter 0 (TM0) counter value, and the timer outputs (TO0/TO1) mode.
CRC0 can be read/written with an 8-bit manipulation instruction. The format of CRC0 is shown in Figure 9-4.
RESET input sets CRC0 to 10H.
Figure 9-4. Capture/Compare Control Register 0 (CRC0) Format
7
6
5
4
3
2
1
0 Address After reset R/W
CRC0 MOD1 MOD0 0
1 CLR01 0
0
0 0FF30H
10H
R/W
MOD1 MOD0 CLR01
Timer Output
Mode Specification
TO0
TO1
TM0 Clear
Opration
when
TM0 = CR01
0
0
0 Toggle output Toggle output Disabled
0
0
1 Toggle output Toggle output Enabled
0
1
0 PWM output Toggle output Disabled
0
1
1
Setting prohibited
1
0
0 PWM output PWM output Disabled
1
0
1
Setting prohibited
1
1
0
Setting prohibited
1
1
1 PPG output Toggle output Enabled
Preliminary User’s Manual U13987EJ1V0UM00
223