UPD784938 Datasheet, PDF (245/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 9 TIMER/EVENT COUNTER 0
9.7.4 PPG output
(1) Basic operation of PPG output
This function outputs a square-wave with the time determined by compare register CR01 value as one cycle, and the time
determined by compare register CR00 value as the pulse width. The PWM cycle output by the PWM is made variable. This
signal can only be output from the timer output (TO0).
When this function is used, the CLR01 bit of capture/compare control register 0 (CRC0) must be set to 1.
The pulse cycle and pulse width are as shown below.
• PPG cycle = (CR01 + 1) × x/fXX; x = 4, 8, 16, 32, 64, 128, 256, 512, 1,024
• PPG pulse width = CR00 × x/fXX
where 1 ≤ CR00 ≤ CR01
• Duty = ^{PPG pulse width} = ^CR00
PPG cycle
CR01 + 1
Figure 9-23 shows an example of PPG output using timer counter 0 (TM0), Figure 9-24 shows an example of the case where
CR00 = CR01.
Figure 9-23. Example of PPG Output Using TM0
TM0
count value
Count start
0H
INTC00
INTC01
TO0
(PPG output)
TO1
(timer output)
CR01
CR00
CR01
CR00
Pulse
width
Pulse cycle
CR01
CR00
Remark ALV0 = 0, ALV1 = 0
Preliminary User’s Manual U13987EJ1V0UM00
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