UPD784938 Datasheet, PDF (677/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 29 INSTRUCTION OPERATIONS
29.1 Conventions
(1) Operand identifiers and descriptions (1/2)
Identifier
r, r’^{Note 1}
r1^{Note 1}
r2
r3
rp, rp’^{Note 2}
rp1^{Note 2}
rp2
rg, rg’
sfr
sfrp
post^{Note 2}
mem
mem1
mem2
mem3
Description
X (R0), A (R1), C (R2), B (R3), R4, R5, R6, R7, R8, R9, R10, R11, E (R12), D (R13), L (R14), H (R15)
X (R0), A (R1), C (R2), B (R3), R4, R5, R6, R7
R8, R9, R10, R11, E (R12), D (R13), L (R14), H (R15)
V, U, T, W
AX (RP0), BC (RP1), RP2, RP3, VP (RP4), UP (RP5), DE (RP6), HL (RP7)
AX (RP0), BC (RP1), RP2, RP3
VP (RP4), UP (RP5), DE (RP6), HL (RP7)
VVP (RG4), UUP (RG5), TDE (RG6), WHL (RG7)
Special function register symbol (see Special Function Register Application Table)
Special function register symbol (register for which 16-bit operation is possible: see Special Function
Register Application Table)
AX (RP0), BC (RP1), RP2, RP3, VP (RP4), UP (RP5)/PSW, DE (RP6), HL (RP7)
Multiple descriptions are permissible. However, UP is only used with PUSH/POP instructions, and PSW
with PUSHU/POPU instructions.
[TDE], [WHL], [TDE+], [WHL+], [TDE–], [WHL–], [VVP], [UUP]: Register indirect addressing
[TDE+byte], [WHL+byte], [SP+byte], [UUP+byte], [VVP+byte]: Based addressing
imm24 [A], imm24 [B], imm24 [DE], imm24 [HL]: Indexed addressing
[TDE+A], [TDE+B], [TDE+C], [WHL+A], [WHL+B], [WHL+C],
[VVP+DE], [VVP+HL]: Based indexed addressing
All mem except [WHL+] and [WHL–]
[TDE], [WHL]
[AX], [BC], [RP2], [RP3], [VVP], [UUP], [TDE], [WHL]
Notes 1. Setting the RSS bit to 1 enables R4 to R7 to be used as X, A, C, and B, but this function should only be used
when using a 78K/III Series program.
2. Setting the RSS bit to 1 enables RP2 and RP3 to be used as AX and BC, but this function should only be
used when using a 78K/III Series program.
Preliminary User’s Manual U13987EJ1V0UM00
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