UPD784938 Datasheet, PDF (484/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 20 IEBus CONTROLLER
20.4.2 Description of internal registers
Each internal register of the IEBus controller is explained below.
(1) Bus control register (BCR)
Figure 20-11. Bus Control Register (BCR) Format
7
65
4
3
2
1
0 Address After reset R/W
BCR ENIEBUS MSTRQ ALLRQ ENSLVTX ENSLVRX 0
0
0 0FFB0H 00H R/W
ENSLVRX
Slave Reception Enable Flag
0 Slave reception disabled
1 Slave reception enabled
ENSLVTX
Slave Transmission Enable Flag
0 Slave transmission disabled
1 Slave transmission enabled
ALLRQ
Broadcasting Request Flag
0 Requests individual communication
1 Requests broadcasting communication
MSTRQ
Master Request Flag
0 Does not request IEBus unit as master
1 Requests IEBus unit as master
ENIEBUS
Communication Enable Flag
0 Stops IEBus unit
1 Makes IEBus unit active
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Preliminary User’s Manual U13987EJ1V0UM00