UPD784938 Datasheet, PDF (464/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 19 3-WIRE SERIAL I/O MODE
19.4.2 Operation when transmission only is enabled
When the CRXE bit of the clocked serial interface mode register (CSIM) is cleared (to 0), data is only transmitted and
reception is disabled. Transmission is started when data is written to the serial shift register (SIO) with the ENCSI bit set
(to 1).
Transmit data is input to SIO instead of the data received from the SI0 pin. If reception is disabled, therefore, the transmit
data can be saved without being lost.
If an instruction that writes data to SI0 is executed when ENCSI = 1 and CRXE = 0, the data is transmitted in 1-bit units
in synchronization with the serial clock. The data of the first bit is output from the SO0 pin, and at the same time, input
to the last bit of SI0. When the transmission is completed by repeating this operation eight times, an interrupt request is
generated.
Figure 19-5. Operation when Reception is Disabled
SIO
SI0 pin
Serial I/O shift register
(a) When the internal clock is selected as the serial clock
When transmission starts, the serial clock is output from the SCK0 pin and data is output in sequence from SIO to the
SO0 pin in synchronization with the fall of the serial clock, and SI0 pin signals are shifted into SIO in synchronization
with the rise of the serial clock.
There is a delay of up to one SCK0 clock cycle between the start of transmission and the first fall of SCK0.
(b) When an external clock is selected as the serial clock
When transmission starts, data is output in sequence from SIO to the SO0 pin in synchronization with the fall of the
serial clock input to the SCK0 pin after the start of transmission, and SI0 pin signals are shifted into SIO in
synchronization with the rise of the SCK0 pin input. If transmission has not started, shift operations are not performed
and the SO0 pin output level does not change even if the serial clock is input to the SCK0 pin.
If transmission is disabled during the transmit operation (by clearing (to 0) the ENCSI), the transmit operation is
discontinued and subsequent SCK0 input is ignored. In this case an interrupt request (INTCSI) is not generated.
Even if the serial clock is input to SCK0 while the CTXE bit is cleared (to 0), shift operations are not performed and
the SO0 pin output level does not change.
Caution When the external clock is selected, do not input the serial clock to the SCK0 pin before setting
transmit data to SIO after transmission has been started. Otherwise, undefined data may be output.
Similarly, do not use the macro service when the external clock is selected.
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Preliminary User’s Manual U13987EJ1V0UM00