UPD784938 Datasheet, PDF (503/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 20 IEBus CONTROLLER
Notes 1. If a slave reception request is confirmed during vector interrupt processing, the data transfer direction
of macro service must change from RAM (memory) → SFR (peripheral) to SFR (peripheral) → RAM
(memory) until the first data is received. The maximum pending period of this data transfer direction
changing processing is about 1,040 µs in communication mode 1.
2. If NACK is received from the slave in the data field, an interrupt (INTIE1) is not issued to the CPU, but
the same data is retransmitted by hardware.
If the transmit data is not written during the period while the next data is being written, a communication
error interrupt occurs due to the occurrence of an underrun, and communication is ended midway
through.
3. The vector interrupt processing in <2> judges whether the data has been correctly transmitted within
one frame. If the data has not been correctly transmitted (if the number of data to be transmitted in
one frame could not be transmitted), the data must be retransmitted in the next frame, or the remainder
of the data must be transmitted.
Preliminary User’s Manual U13987EJ1V0UM00
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