UPD784938 Datasheet, PDF (254/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 9 TIMER/EVENT COUNTER 0
9.8.2 Operation as interval timer (2)
TM0 operates as an interval timer that generates interrupts repeatedly with the preset count time as the interval (see Figure
9-34).
This interval timer can count within the range shown in Table 9-1 (internal system clock fXX = 32 MHz).
The control register settings are shown in Figure 9-35, and the setting procedure in Figure 9-36.
Figure 9-34. Interval Timer Operation (2) Timing
n
n
TM0
count value
0H
Compare register
(CR01)
Count start
Clear
n
Clear
INTC01
interrupt request
Interval
Remark Interval = (n + 1) × 4/fXX, 0 ≤ n ≤ FFFFH
Interrupt acknowledged
Interval
Interrupt acknowledged
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Preliminary User’s Manual U13987EJ1V0UM00