UPD784938 Datasheet, PDF (252/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 9 TIMER/EVENT COUNTER 0
9.8 Examples of Use
9.8.1 Operation as interval timer (1)
When timer counter 0 (TM0) is made free-running and a fixed value is added to the compare register (CR0n: n = 0, 1) in the
interrupt service routine, TM0 operates as an interval timer with the added fixed value as the cycle (see Figure 9-30).
This interval timer can count within the range shown in Table 9-1 (internal system clock fXX = 32 MHz).
Since TM0 has two compare registers, two interval timers with different cycles can be constructed.
The control register settings are shown in Figure 9-31, the setting procedure in Figure 9-32, and the processing in the interrupt
service routine in Figure 9-33.
Figure 9-30. Interval Timer Operation (1) Timing
FFFFH
FFFFH
MOD (3n)
TM0
count value
n
MOD (2n)
0H
Compare register
(CR00)
Timer start
n
MOD (2n)
MOD (3n)
MOD (4n)
INTC00
interrupt request
Interval
Remark Interval = n × 4/fXX, 1 ≤ n ≤ FFFFH
Rewritten by
interrupt program
Interval
Rewritten by
interrupt program
Interval
Rewritten by
interrupt program
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Preliminary User’s Manual U13987EJ1V0UM00