UPD784938 Datasheet, PDF (115/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 5 REGULATOR
5.1 Outline of Regulator
The µPD784938 has a regulator that reduces the power consumption of the device (a circuit for low voltage
operation). The operation of this regulator is controlled by the input level of the REGOFF pin. When the REGOFF
pin is made high, the regulator is turned OFF; when it is made low, the regulator is turned ON.
When the regulator is turned ON, it enables to reduce the power consumption.
To stabilize the output voltage of the regulator, connect a capacitor for stabilizing the regulator (approximately 1
µF) to the REGC pin.
Apply the same level as VDD to the REGC pin when the regulator is stopped. Figure 5-1 shows the block diagram
of the peripherals of the regulator.
Figure 5-1. Regulator Peripherals Block Diagram
REGOFF
Low level: Regulator ON
High level: Regulator OFF
VDD
Regulator
Internal supply voltage
(Supplied to CPU and each peripheral circuit)
REGC
1 µF
• Processing of REGC pin
Regulator ON
Regulator OFF
Connects capacitance for regulator stabilization
Supplies power supply voltage
Caution For the oscillation stabilization time when the stop mode is released, set a value of at least 10.4 ms with
the oscillation stabilization time specification register (OSTS), taking in consideration the regulator
output oscillation stabilization time. (refer to CHAPTER 25 STANDBY FUNCTION.)
Preliminary User’s Manual U13987EJ1V0UM00
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