UPD784938 Datasheet, PDF (631/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 24 LOCAL BUS INTERFACE FUNCTION
(a) Internal memory accesses
In the case of internal memory accesses in which the external pseudo-static RAM is not accessed, also, refresh
bus cycles are output at the intervals specified by the refresh mode register (RFM) so that the data stored in the
pseudo-static RAM is retained. In this case, CPU instruction execution is not affected.
Figure 24-17. Pulse Refresh Operation in Internal Memory Access
Refresh timing counter
REFRQ
pin output
Refresh cycle^Note
Note Cycle specified by the RFT1 and RFT0 bits of the RFM
Preliminary User’s Manual U13987EJ1V0UM00
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