UPD784938 Datasheet, PDF (90/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 3 CPU ARCHITECTURE
Figure 3-11. Data Restored from Stack Area
POP sfr instruction
stack
SP←SP+1
SP+1
↑
SP
POP sfrp instruction
stack
SP←SP+2
SP+1
↑
SP
Upper byte
Lower byte
POP PSW instruction
stack
SP←SP+2
↑
SP+1
↑
SP
PSWH7 to
PSWH4
–^Note
PSWL
POP rg instruction
stack
SP←SP+3
SP+2
↑
SP+1
↑
SP
Upper byte
Middle byte
Lower byte
RET instruction
stack
SP←SP+3
SP+2
↑
SP+1
↑
SP
–^Note
PC19 to
PC16
PC15 to PC8
PC7 to PC0
RETI, RETB instruction
stack
POP post, POPU post instruction
(In case of POP AX, RP2, RP3)
stack
SP←SP+4
SP←SP+6
SP+3
PSWH7 to
PSWH4
PC19 to
PC16
↑
SP+2
PSWL
SP+5
↑
SP+4
R7
R6

 RP3

↑
SP+1
↑
SP
PC15 to PC8
PC7 to PC0
↑
SP+3
R5

↑
 ^RP2
SP+2
R4

↑
SP+1
A

↑
 ^AX
SP
X

Note This 4-bit data is ignored.
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Preliminary User’s Manual U13987EJ1V0UM00