UPD784938 Datasheet, PDF (658/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 26 RESET FUNCTION
In a reset operation upon powering on, the RESET signal must be kept active until the oscillation stabilization time has
elapsed.
As the time taken for oscillation stabilization is influenced by the crystal oscillator/ceramic resonator used and the
capacitance of capacitor connected, please contact the manufacturer of the crystal oscillator/ceramic resonator for details.
Figure 26-2. Power-On Reset Operation
Oscillation stabilization time
Execution of instruction at
Delay PC initialization, etc. _{reset start address}
VDD
RESET
(input)
Internal reset signal
Remark fCLK: Internal system clock frequency
Reset end
Table 26-1. Pin Statuses During Reset Input and After Reset Release
Pin Name
P00 to P07
P10 to P17
P20/NMI to P27/SI
P30/RxD/SI1 to P37/TO3
P40/AD0 to P47/AD7
P50/A8 to P57/A15
P60/A16 to P63/A19
P64/RD, P65/WR
P66/WAIT, P67/REFRQ
P70/ANI0 to P77/ANI7
P90 to P97
P100 to P107/SO3
ASTB/CLKOUT
PWM0, PWM1
TX
RX
Input/Output
Input/output
Input/output
Input
Input/output
Input/output
Input/output
Input/output
Input/output
Input/output
Input/output
Input/output
Input/output
Output
Output
Output
Input
On Reset
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Directly After Reset Release
Hi-Z (input port mode)
Hi-Z (input port mode)
Hi-Z (input port)
Hi-Z (input port mode)
Hi-Z (input port mode)
Hi-Z (input port mode)
Hi-Z (input port mode)
Hi-Z (input port mode)
Hi-Z (input port mode)
Hi-Z (input port mode)
Hi-Z (input port mode)
Hi-Z (input port mode)
0
Low level output
Low level output
Hi-Z (input port)
658
Preliminary User’s Manual U13987EJ1V0UM00