UPD784938 Datasheet, PDF (389/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 13 WATCHDOG TIMER
Figure 13-2. Watchdog Timer Mode Register (WDM) Format
7
6
WDM RUN 0
5
4
3
2
1
0
0 PRC 0 WDI2 WDI1 0
Address After reset R/W
FFC2H
00H R/W
WDI2 WDI1
Overflow Time [ms]
fCLK = 12.58 MHz
0
0 2¹⁷/fCLK (10.4)
0
1 2¹⁹/fCLK (41.7)
1
0 2²⁰/fCLK (83.4)
1
1 2²¹/fCLK (166.7)
Remark fCLK: Internal System Clock Frequency
PRC Watchdog Timer Interrupt Request Priority
Specification
0 Watchdog timer interrupt request <
NMI pin input interrupt request
1 _{Watchdog timer interrupt request >}
NMI pin input interrupt request
RUN Watchdog Timer Operation Specification
0 Watchdog timer stopped
1 Clear watchdog timer and start count
Cautions 1. The watchdog timer mode register (WDM) can only be written to with a dedicated instruction (MOV
WDM, #byte).
2. The same value should be written each time in writes to the WDM to set (to 1) the RUN bit. The
contents written at the first time cannot be changed even if a different value is written.
3. Once the RUN bit has been set (to 1), it cannot be reset (to 0) by software.
Preliminary User’s Manual U13987EJ1V0UM00
389