UPD784938 Datasheet, PDF (340/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 11 TIMER/EVENT COUNTER 2
11.8.4 PPG output
(1) Basic operation of PPG output
This function outputs a square-wave with the time determined by compare register CR21 value as one cycle, and the
time determined by compare register CR20 value as the pulse width. The PWM output PWM cycle is made variable.
This signal can only be output from timer output (TO2).
When this function is used, it is necessary to set the CLR21 bit of capture/compare control register 2 (CRC2) to 1 and
the CLR22 bit to 0, and to set the CMD2 bit of timer control register 1 (TMC1) to 0.
The pulse cycle and pulse width are as shown below.
• PPG cycle = (CR21 + 1) × x/fXX; x = 4, 8, 16, 32, 64, 128, 256, 512, 1,024
• PPG pulse width = CR20 × x/fXX where 1 ≤ CR20 ≤ CR21
• Duty = ^{PPG pluse width} = ^CR20
PPG cycle
CR21 + 1
Figure 11-29 shows an example of PPG output using timer counter 2 (TM2), Figure 11-30 shows an example of the case
where CR20 = CR21.
340
Preliminary User’s Manual U13987EJ1V0UM00