UPD784938 Datasheet, PDF (83/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 3 CPU ARCHITECTURE
3.7 Control Registers
Control registers consist of the program counter (PC), program status word (PSW), and stack pointer (SP).
3.7.1 Program counter (PC)
This is a 20-bit binary counter that holds address information on the next program to be executed (see Figure 3-7).
Normally, the PC is incremented automatically by the number of bytes in the fetched instruction. When an instruction
associated with a branch is executed, the immediate data or register contents are set in the PC.
Upon RESET input, the 16-bit data in address 0 and 1 is set in the low-order 16 bits, and 0000 in the high-order 4 bits of the
PC.
Figure 3-7. Program Counter (PC) Format
19
0
PC
3.7.2 Program status word (PSW)
The program status word (PSW) is a 16-bit register comprising various flags that are set or reset according to the result of
instruction execution.
Read accesses and write accesses are performed in high-order 8-bit (PSWH) and low-order 8-bit (PSWL) units. Individual
flags can be manipulated by bit-manipulation instructions.
The contents of the PSW are automatically saved to the stack when a vectored interrupt request is acknowledged or a BRK
instruction is executed, and automatically restored when an RETI or RETB instruction is executed. When context switching is
used, the contents are automatically saved in RP3, and automatically restored when an RETCS or RETCSB instruction is
executed.
RESET input resets (to 0) all bits.
“0” must always be written to the bits written as “0” in Figure 3-8. The contents of bits written as “-” are undefined when read.
Figure 3-8. Program Status Word (PSW) Format
Symbol
7
6
5
4
3
2
1
0
PSWH
UF RBS2 RBS1 RBS0
–
–
–
–
7
PSWL
S
6
5
4
3
2
1
0
Z
RSS AC
IE
P/V
0
CY
The flags are described below.
(1) Carry flag (CY)
The carry flag records a carry or borrow resulting from an operation.
This flag also records the shifted-out value when a shift/rotate instruction is executed, and functions as a bit accumulator
when a bit-manipulation instruction is executed.
The status of the CY flag can be tested with a conditional branch instruction.
Preliminary User’s Manual U13987EJ1V0UM00
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