UPD784938 Datasheet, PDF (307/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 11 TIMER/EVENT COUNTER 2
(3) Pulse width measurement
Detects the pulse width of the signal input to an external interrupt request input pins (INTP1 and INTP2).
Table 11-3. Timer/Event Counter 2 Pulse Width Measurement Range
Measurable Pulse Width^Note
Resolution
4/fXX
(0.32 µs)
to 2¹⁶ × 4/fXX
(20.8 ms)
4/fXX
(0.32 µs)
8/fXX
(0.64 µs)
to 2¹⁶ × 8/fXX
(41.7 ms)
8/fXX
(0.64 µs)
16/fXX
(1.27 µs)
to 2¹⁶ × 16/fXX
(83.4 ms)
16/fXX
(1.27 µs)
32/fXX
(2.54 µs)
to 2¹⁶ × 32/fXX
(167 ms)
32/fXX
(2.54 µs)
64/fXX
(5.09 µs)
to 2¹⁶ × 64/fXX
(333 ms)
64/fXX
(5.09 µs)
128/fXX
(10.17 µs)
to 2¹⁶ × 128/fXX
(667 ms)
128/fXX
(10.17 µs)
256/fXX
(20.35 µs)
to 2¹⁶ × 256/fXX
(1.33 s)
256/fXX
(20.35 µs)
512/fXX
(40.70 µs)
to 2¹⁶ × 512/fXX
(2.67 s)
512/fXX
(40.70 µs)
1,024/fXX
(81.40 µs)
to 2¹⁶ × 1,024/fXX
(5.33 s)
1,024/fXX
(81.40 µs)
( ): When fXX = 12.58 MHz
Note
The minimum pulse width that can be measured differs depending on the selected value of fCLK.
The minimum pulse width that can be measured is the value of 3/fCLK or the value in the above table, whichever
greater.
(4) External event counter
Counts the clock pulses input from the external interrupt request input pin (INTP2) (CI pin input pulses). The clocks
that can be input to timer/event counter 2 are shown in Table 11-4.
Table 11-4. Clocks Enabled to be Input to Timer/Event Counter 2
Maximum frequency
Minimum pulse width
(High and low levels)
When Counting One Edge
fCLK/6 (2.10 MHz)
3/fCLK (0.24 µs)
When Counting Both Edges
fCLK/6 (2.10 MHz)
3/fCLK (0.24 µs)
( ): When fCLK = 12.58 MHz and fXX = 12.58 MHz
Preliminary User’s Manual U13987EJ1V0UM00
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