UPD784938 Datasheet, PDF (707/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 29 INSTRUCTION OPERATIONS
(3) 24-bit instructions (combinations expressed by writing WHL for rg are shown in parentheses)
MOVG, ADDG, SUBG, INCG, DECG, PUSH, POP
Table 29-3. List of Instructions by 24-Bit Addressing
2nd Operand #imm24
WHL
1st Operand
WHL
rg
(MOVG)
(ADDG)
(SUBG)
MOVG
ADDG
SUBG
(MOVG)
(ADDG)
(SUBG)
(MOVG)
(ADDG)
(SUBG)
rg
rg’
(MOVG)
(ADDG)
(SUBG)
MOVG
ADDG
SUBG
saddrg
(MOVG)
ADDG
SUBG
MOVG
!!addr24
mem1
(MOVG) MOVG
MOVG
[%saddrg]
SP
MOVG
MOVG
saddrg
!!addr24
mem1
[%saddrg]
SP
MOVG
(MOVG)
(MOVG)
MOVG
MOVG
MOVG
MOVG
MOVG
None^Note
INCG
DECG
PUSH
POP
INCG
DECG
Note There is no 2nd operand, or the 2nd operand is not an operand address.
(4) Bit manipulation instructions
MOV1, AND1, OR1, XOR1, SET1, CLR1, NOT1, BT, BF, BTCLR, BFSET
Table 29-4. List of Instructions by Bit Manipulation Instruction Addressing
2nd Operand
CY
1st Operand
CY
saddr.bit
sfr.bit
A.bit
X.bit
PSWL.bit
PSWH.bit
mem2.bit
!addr16.bit
!!addr24.bit
MOV1
saddr.bit sfr.bit
A.bit X.bit
PSWL.bit PSWH.bit
mem2.bit
!addr16.bit
!!addr24.bit
MOV1
AND1
OR1
XOR1
/saddr.bit /sfr.bit
/A.bit /X.bit
/PSWL.bit /PSWH.bit
/mem2.bit
/!addr16.bit
/!!addr24.bit
AND1
SET1
None^Note
NOT1
SET1
CLR1
NOT1
SET1
CLR1
BF
BT
BTCLR
BFSET
Note There is no 2nd operand, or the 2nd operand is not an operand address.
Preliminary User’s Manual U13987EJ1V0UM00
707