UPD784938 Datasheet, PDF (353/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 11 TIMER/EVENT COUNTER 2
11.9.3 Pulse width measurement operation
In pulse width measurement, the high-level or low-level width of external pulses input to the external interrupt request
input pin (INTP1) are measured.
Both the high-level and low-level widths of pulses input to the INTP1 pin must be at least 3 system clocks (0.24 µs: fCLK
= 12.58 MHz); if shorter than this, the valid edge will not be detected and a capture operation will not be performed.
As shown in Figure 11-42, the timer counter 2 (TM2) value being counted is fetched into the capture register (CR22)
in synchronization with a valid edge (specified as both rising and falling edges) in the INTP1 pin input, and held there. The
pulse width is obtained from the product of the difference value between the TM2 count value (Dn) fetched into and held
in the CR22 on detection of the nth valid edge and the count value (Dn-1) fetched and held on detection of n-1th valid edge,
and the number of n-1th count clocks (x/fXX; x = 4, 8, 16, 32, 64, 128, 256, 512, 1,024).
The control register settings are shown in Figure 11-43, and the setting procedure in Figure 11-44.
Figure 11-42. Pulse Width Measurement Timing
FFH
FFH
TM2
count value
D1
D3
D0
0H
Capture
Count start
Capture
D2
Capture
Capture
INTP1
external input signal
INTP1
interrupt request
(D1-D0) × x/fXX
(100H-D1+
D2) × x/fXX
(D3-D2) × x/fXX
Capture register
(CR22)
D0
D1
D2
D3
OVF2
Remark Dn: TM2 count value (n = 0, 1, 2, ...)
x = 4, 8, 16, 32, 64, 128, 256, 512, 1,024
Cleared by software
Preliminary User’s Manual U13987EJ1V0UM00
353