UPD784938 Datasheet, PDF (537/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 23 INTERRUPT FUNCTIONS
Figure 23-1. Interrupt Control Registers (××ICn) (4/4)
7
6
5
4
3
IEIC1 IEIF1 IEMK1 IEISM1 IECSE1 0
2
1
0
Address After reset R/W
0 IEPR11 IEPR10 0FFF6H
43H
R/W
IEIC2 IEIF2 IEMK2 IEISM2 IECSE2 0
0 IEPR21 IEPR20 0FFF7H
43H
R/W
WIC WIF WMK WISM WCSE
0
0
WPR1 WPR0 0FFF8H
43H
R/W
CSIIC3 CSIIF3 CSIMK3 CSIISM3 CSICSE3 0
0 CSIPR31 CSIPR30 0FFF9H
43H
R/W
××PRn1 ××PRn0 Interrupt Request Priority
(Bit 1) (Bit 0)
Specification
0
0
Priority 0 (highest priority)
0
1
Priority 1
1
0
Priority 2
1
1
Priority 3
××CSEn
(Bit 4)
Context Switching Service
Specification
0
Serviced by vectored interrupt
1
Serviced by context switching
××ISMn Interrupt Service Mode Specification
(Bit 5)
0
Vectored interrupt service/
context switching service
1
Macro service
××MKn Interrupt Service Enabling/Disabling
(Bit 6)
0
Interrupt service enabled
1
Interrupt service disabled
××IFn
(Bit 7)
0
1
Interrupt Request Generation
Presence/Absence
No interrupt request
(interrupt signal not being generated)
Interrupt request state
(interrupt signal being generated)
Preliminary User’s Manual U13987EJ1V0UM00
537