UPD784938 Datasheet, PDF (361/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 11 TIMER/EVENT COUNTER 2
Figure 11-51. Control Register Settings for PPG Output Operation
(a) Timer control register 1 (TMC1)
7
6
5
4
3
2
1
0
TMC1 1
0
0
0
×
×
0
0
Normal mode
Overflow flag
TM2 count enabled
(b) Prescaler mode register 1 (PRM1)
7
6
5
4
3
2
1
0
PRM1 PRS23 PRS22 PRS21 PRS20 ×
×
×
×
Count clock specification
(x/fXX ; x = 4, 8, 16, 32, 64, 128, 256,
512, 1,024)
(c) Capture/compare control register 2 (CRC2)
7
6
5
4
3
2
1
0
CRC2 1
1
0
1
1
0
0
0
Cleared by match of TM2 & CR21
Clearing when TM2 is captured in CR22
disabled
TO2 = PPG output
(d) Timer output control register (TOC)
7
6
5
4
3
2
1
0
TOC
×
×
1
0
×
×
×
×
TO2 = active-high PPG signal output
TO2 PPG output enabled
(e) Port 3 mode control register (PMC3)
7
6
5
4
3
2
1
0
PMC3 ×
1
×
×
×
×
×
×
P36 pin set as TO2 output
Preliminary User’s Manual U13987EJ1V0UM00
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