UPD784938 Datasheet, PDF (536/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 23 INTERRUPT FUNCTIONS
Figure 23-1. Interrupt Control Registers (××ICn) (3/4)
7
6
5
4
3
CSIIC1 CSIIF1 CSIMK1 CSIISM1 CSICSE1 0
2
1
0
Address After reset R/W
0 CSIPR11 CSIPR10 0FFEFH
43H
R/W
STIC STIF STMK STISM STCSE 0
0 STPR1 STPR0 0FFF0H
43H
R/W
CSIIC CSIIF CSIMK CSIISM CSICSE 0
0 CSIPR1 CSIPR0 0FFF1H
43H
R/W
SERIC2 SERIF2 SERMK2 0 SERCSE2 0
0 SERPR21 SERPR20 0FFF2H
43H
R/W
SRIC2 SRIF2 SRMK2 SRISM2 SRCSE2 0
0 SRPR21 SRPR20 0FFF3H
43H
R/W
CSIIC2 CSIIF2 CSIMK2 CSIISM2 CSICSE2 0
0 CSIPR21 CSIPR20 0FFF3H
43H
R/W
STIC2 STIF2 STMK2 STISM2 STCSE2 0
0 STPR21 STPR20 0FFF4H
43H
R/W
××PRn1 ××PRn0 Interrupt Request Priority
(Bit 1) (Bit 0)
Specification
0
0
Priority 0 (highest priority)
0
1
Priority 1
1
0
Priority 2
1
1
Priority 3
××CSEn
(Bit 4)
Context Switching Service
Specification
0
Serviced by vectored interrupt
1
Serviced by context switching
××ISMn Interrupt Service Mode Specification
(Bit 5)
0
Vectored interrupt service/
context switching service
1
Macro service
××MKn Interrupt Service Enabling/Disabling
(Bit 6)
0
Interrupt service enabled
1
Interrupt service disabled
××IFn
(Bit 7)
0
1
Interrupt Request Generation
Presence/Absence
No interrupt request
(interrupt signal not being generated)
Interrupt request state
(interrupt signal being generated)
536
Preliminary User’s Manual U13987EJ1V0UM00