UPD784938 Datasheet, PDF (652/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 25 STANDBY FUNCTION
(1) IDLE mode release by NMI input
IDLE mode is released when the valid edge specified by external interrupt mode register 0 (INTM0) is input to the NMI
input.
When the µPD784938 is released from IDLE mode, if a non-maskable interrupt by NMI pin input can be acknowledged,
a branch is made to the NMI interrupt service program. If the interrupt cannot be acknowledged (if the IDLE mode
is set in an NMI interrupt service program, etc.), execution is resumed from the instruction following the instruction that
set the IDLE mode, and a branch is made to the NMI interrupt service program when acknowledgment becomes possible
(by execution of an RETI instruction, etc.).
See 23.6 Non-maskable Interrupt Acknowledgment Operation for details of NMI interrupt acknowledgment.
(2) IDLE mode release by INTP4 or INTP5 input
When masking of interrupts by INTP4 and INTP5 input is released and macro service is disabled, IDLE mode is released
when the valid edge specified by external interrupt mode register 1 (INTM1) is input to the INTP4 or INTP5 input.
When the µPD784938 is released from IDLE mode, if an interrupt can be acknowledged when the interrupt enable flag
(IE) is set (to 1), a branch is made to the interrupt service program. If the interrupt cannot be acknowledged and if
the IE flag is cleared (to 0), execution is resumed from the instruction following the instruction that set the IDLE mode.
See 23.7 Maskable Interrupt Acknowledgment Operation for details of interrupt acknowledgment.
(3) IDLE mode release by RESET input
When RESET input falls from high to low and the reset state is established, the oscillator resumes oscillation. The
oscillation stabilization time should be secured while RESET is active. Thereafter, normal operation is started when
RESET rises.
Unlike an ordinary reset operation, data memory retains its contents prior to IDLE mode setting.
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Preliminary User’s Manual U13987EJ1V0UM00