UPD784938 Datasheet, PDF (538/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 23 INTERRUPT FUNCTIONS
23.3.2 Interrupt mask registers (MK0/MK1)
MK0 and MK1 are composed of interrupt mask flags. MK0 and MK1 are 16-bit register which can be manipulated as
8-bit units, MK0L, MK0H, MK1L, and MK1H, as well as being manipulated as a 16-bit unit.
In addition, each bit of MK0 and MK1 can be manipulated individually with a bit manipulation instruction. Each interrupt
mask flag controls enabling/disabling of the corresponding interrupt request.
When an interrupt mask flag is set (to 1), acknowledgment of the corresponding interrupt request is disabled.
When an interrupt mask flag is cleared (to 0), the corresponding interrupt request can be acknowledged as a vectored
interrupt or macro service request.
Each interrupt mask flag in MK0 and MK1 is the same flag as the interrupt mask flag in the interrupt control register.
MK0 and MK1 are provided for en bloc control of interrupt masking.
RESET input sets MK0 and MK1 to FFFFH, and all maskable interrupts are disabled.
Figure 23-2. Interrupt Mask Register (MK0, MK1) Format (1/2)
(1) Byte Accesses
7
6
5
4
3
MK0L CMK11 CMK10 CMK01 CMK00 PMK3
2
PMK2
1
PMK1
0
PMK0
Address After reset R/W
0FFACH FFH
R/W
MK0H
CSIMK1
SRMK
SERMK
ADMK
PMK5
PMK4 CMK30 CMK21 CMK20
0FFADH
FFH
R/W
MK1L IEMK2 IEMK1
1
STMK2
CSIMK2
SRMK2
SERMK2
CSIMK
STMK
0FFAEH
FFH
R/W
MK1H 1
1
1
1
1
1 CSIMK3 WMK 0FFAFH FFH
R/W
MK
Interrupt Request Enabling/Disabling
Specification
0
Interrupt service enabled
1
Interrupt service disabled
538
Preliminary User’s Manual U13987EJ1V0UM00