UPD784938 Datasheet, PDF (597/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 23 INTERRUPT FUNCTIONS
23.11.1 Interrupt acknowledge processing time
The time shown in Table 23-7 is required to acknowledge an interrupt request. After the time shown in this table has
elapsed, execution of the interrupt processing program is started.
Vector Table
Branch
Destination
Stack
Vectored
Interrupts
Context
Switching
Table 23-7. Interrupt Acknowledge Processing Time
IROM, PRAM
IROM
EMEM
PRAM
EMEM
(Unit: Clock = 1/fCLK)
EMEM
IRAM
26
PRAM EMEM IRAM
29 37 + 4n 27
PRAM EMEM IRAM
30 38 + 4n 30
PRAM EMEM IRAM
33 41 + 4n 31
PRAM EMEM
34 42 + 4n
22
–
–
23
–
–
22
–
–
23
–
–
Remarks 1. IROM: internal ROM (with high-speed fetch specified)
PRAM: peripheral RAM of internal RAM (only when LOCATION 0 instruction is executed in the case of
branch destination)
IRAM: internal high-speed RAM
EMEM: internal ROM when external memory and high-speed fetch are not specified
2. n is the number of wait states per byte necessary for writing data to the stack (the number of wait states
is the sum of the number of address wait states and the number of access wait states).
3. It the vector table is EMEM, and if wait states are inserted in reading the vector table, add 2 m to the value
of the vectored interrupt in the above table, and add m to the value of context switching, where m is the
number of wait states per byte necessary for reading the vector table.
4. It the branch destination is EMEM and if wait states are inserted in reading the instruction at the branch
destination, add that number of wait states.
5. If the stack is occupied by PRAM and if the value of the stack pointer (SP) is odd, add 4 to the value in
the above table.
6. The number of wait states is the sum of the number of address wait states and the number of access wait
states.
Preliminary User’s Manual U13987EJ1V0UM00
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