UPD784938 Datasheet, PDF (103/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 3 CPU ARCHITECTURE
3.10 Cautions
(1) Program fetches cannot be performed from the internal high-speed RAM area (0FD00H to 0FEFFH when the LOCATION
0 instruction is executed; FFD00H to FFEFFH when the LOCATION 0FH instruction is executed).
(2) Special function registers (SFRs)
Addresses onto which SFRs are not assigned should not be accessed in the area 0FF00H to 0FFFFH^Note. If such an address
is accessed by mistake, the µPD784938 may become deadlocked. A deadlock can only be released by reset input.
Note When the LOCATION 0 instruction is executed; FFF00H to FFFFFH when the LOCATION 0FH instruction is
executed.
(3) Stack pointer (SP) operation
With stack addressing, the entire 1-Mbyte space can be accessed, but a stack area cannot be reserved in the SFR area
or internal ROM area.
(4) Stack pointer (SP) initialization
The SP is undefined after RESET input, while non-maskable interrupts can be acknowledged directly after reset release.
Therefore, an unforeseen operation may be performed if a non-maskable interrupt request is generated while the SP is in
the undefined state directly after reset release. To minimize this risk, the following program should be coded without fail
after reset release.
RSTVCT
INITSEG
RSTSTRT :
CSEG AT 0
DW RSTSTRT
to
CSEG BASE
LOCATION 0H ; or LOCATION 0FH
MOVG SP, #STKBGN
Preliminary User’s Manual U13987EJ1V0UM00
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