UPD784938 Datasheet, PDF (296/733 Pages) NEC – 16-Bit Single-Chip Microcontrollers

CHAPTER 10 TIMER/EVENT COUNTER 1
10.7.2 Operation as interval timer (2)
TM1 operates as an interval timer that generates interrupts repeatedly with the preset count time as the interval (see Figure
10-23).
The control register settings are shown in Figure 10-24, and the setting procedure in Figure 10-25.
Figure 10-23. Interval Timer Operation (2) Timing (when CR11 is used as Compare Register)
n
n
TM1
count value
0H
Compare register
(CR11)
Count start
INTC11
interrupt request
Clear
Match
Clear
n
Match
Interval
Remark
Interval = (n+1) × x/fXX
0 ≤ n ≤ FFH
x = 4, 8, 16, 32, 64, 128, 256, 512, 1,024
Interrupt acknowledge
Interval
Interrupt acknowledge
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Preliminary User’s Manual U13987EJ1V0UM00