82583V Datasheet, PDF (8/374 Pages) Intel Corporation – Intel® 82583V GbE Controller

Revision History
82583V GbE Controller—Datasheet
Date
June 2012
January 2012
February 2011
October 2009
August 2009
June 2009
April 2009
June 2010
April 2010
Revision Description
2.5
• Revised table 24 - NVM Map of Address Range 0x00-0x3F (Word 0x05).
• Revised section 9.2.5.11 - Receive Descriptor Control - RXDCTL (0x02828; RW).
2.4
• Revised section 9.2.2.3 (EEPROM/FLASH Control Register; bit 23 footnote).
• Revised section 9.2.2.15 (Extended Configuration Control; bits 7:5).
• Updated table 18 (Cload value).
• Updated section 3.9 “Oscillator/Crystal Specifications” (added Cload note).
• Updated section 11.3.1.8 “Load Capacitance and Discrete Capacitors” (new crystal load
capacitance formula).
• Added new section 11.5.4 “Designing the 82583V as a 10/100 Mb/s Only Device”.
• Removed section 11.5.5.7.1 “Signal Detect”.
• Removed all references to “heat sinks” in section 12.0 “Thermal Design Considerations”.
• Updated sections 5.2.1.12 (bits 15:13), 6.1.1.13 (bits 6:5), 6.1.1.15 (bits 15:8) - changed bit
values.
• Added section 3.6 “Flash AC Specifications” and section 3.7 “EEPROM AC Specifications”.
2.3
• Added MDIO and NVM semaphore information to section 4.5.1.
• Removed section 5.1.
• Added new hardware defaults and NVM image settings to section 5.0 “Non-Volatile Memory
(NVM) Map”.
• Revised section 6.3.2 “Supported NVM Devices”.
• Revised section 9.2.3.11 (bit 1:0 descriptions).
• Revised section 12.6 “Product Package Thermal Specification” - added a psi JT note after table
60.
• Revised section 10.1.2.2 “Device ID” - changed to 0x150C.
• Revised section 5.1.1.1.6 (PCIe Init Configuration 3 Word (Word 0x1A); bits 3:2).
• Revised section 10.1.5.1.7 (Link CAP, Offset 0xEC, (RO); bits 11:10).
2.2
• Changed the pull-up value of AUX_PWR from 1 KΩ to 10 KΩ. in the schematic checklist.
• Changed “calibration load” to “Cload” in the schematic checklist.
2.1
Updated section 11.3.1.6 “Load Capacitance”.
2.0
Initial Public Release.
1.0
Initial Release (Intel Confidential).
3.0
• Updated section 6.1.2.1 (NVM words 0x03 through 0x07).
• Added new section 13.10 (Assembly Process Flow).
2.9
Updated sections 6.1.1.12 (bits 15:13), 6.1.1.13 (bits 6:5), 6.1.1.15 (bits 15:8) - changed bit
values.
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