82583V Datasheet, PDF (51/374 Pages) Intel Corporation – Intel® 82583V GbE Controller

Initialization—82583V GbE Controller
4.6
4.6.1
4.6.2
Software Initialization Sequence
The following sequence of commands is typically issued to the device by the software
device driver in order to initialize the 82583V to normal operation. The major
initialization steps are:
1. Disable Interrupts - see Interrupts during initialization.
2. Issue Global Reset and perform General Configuration - see Global Reset and
General Configuration.
3. Setup the PHY and the link - see Link Setup Mechanisms and Control/Status Bit
Summary.
4. Initialize all statistical counters - see Initialization of Statistics.
5. Initialize Receive - see Receive Initialization.
6. Initialize Transmit - see Transmit Initialization.
7. Enable Interrupts - see Interrupts during initialization.
Interrupts During Initialization
Most drivers disable interrupts during initialization to prevent re-entrancy. Interrupts
are disabled by writing to the IMC register. Note that the interrupts need to be disabled
also after issuing a global reset, so a typical driver initialization flow is:
1. Disable interrupts
2. Issue a global reset
3. Disable interrupts (again)
4. …
After the initialization completes, a typical driver enables the desired interrupts by
writing to the IMS register.
Global Reset and General Configuration
Device initialization typically starts with a global reset that puts the device into a known
state and enables the software device driver to continue the initialization sequence.
Several values in the Device Control (CTRL) register need to be set at power up or after
a device reset for normal operation.
• Full duplex should be set per interface negotiation (if done in software), or is set by
the hardware if the interface is auto-negotiating. This is reflected in the Device
Status register in the auto-negotiating case. A default value is loaded from the
NVM.
• Speed is determined via auto-negotiation by the PHY, or forced by software if the
link is forced. Status information for speed is also readable in STATUS.
• ILOS should normally be set to 0b.
If using XOFF flow control, program the FCAH, FCAL, and FCT registers. If not, they
should be written with 0x0.
GCR bit 22 should be set to 1b by software during initialization.
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